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24AA64/24LC64
7.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 7-1.
TABLE 7-1:
PIN FUNCTION TABLE
Name
A0
A1
A2
V SS
SDA
SCL
WP
V CC
PDIP
1
2
3
4
5
6
7
8
SOIC
1
2
3
4
5
6
7
8
TSSOP
1
2
3
4
5
6
7
8
MSOP
1
2
3
4
5
6
7
8
ROTATED
TSSOP
3
4
5
6
7
8
1
2
Description
Chip Address Input
Chip Address Input
Chip Address Input
Ground
Serial Address/Data I/O
Serial Clock
Write Protect Input
+1.8V to 5.5V Power Supply
7.1
A0, A1, A2 Chip Address Inputs
7.3
Serial Clock (SCL)
The A0, A1, A2 inputs are used by the 24XX64 for mul-
tiple device operation. The levels on these inputs are
compared with the corresponding bits in the slave
This input is used to synchronize the data transfer from
and to the device.
address. The chip is selected if the compare is true.
7.4
Write Protect (WP)
Up to eight devices may be connected to the same bus
by using different chip select bit combinations. These
inputs must be connected to either V CC or V SS .
This pin can be connected to either V SS , V CC or left
floating. An internal pull-down resistor on this pin will
keep the device in the unprotected state if left floating.
7.2
Serial Data (SDA)
If tied to V SS or left floating, normal memory operation
is enabled (read/write the entire memory 0000-1FFF).
This is a bi-directional pin used to transfer addresses
and data into and data out of the device. It is an open-
drain terminal, therefore, the SDA bus requires a pull-
up resistor to V CC (typical 10 k ? for 100 kHz, 2 k ? for
400 kHz)
For normal data transfer SDA is allowed to change only
during SCL low. Changes during SCL high are
reserved for indicating the START and STOP condi-
tions.
DS21189F-page 12
If tied to V CC , WRITE operations are inhibited. Read
operations are not affected.
? 2002 Microchip Technology Inc.
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